X-Message-Number: 27624
From: 
Date: Thu, 16 Feb 2006 03:38:48 EST
Subject: Uploading (3.iv.1) What chips to use?

Uploading (3.iv.1) What chips to use?

There are two main FPGA  producers: Altera and Xilinx, there is too a 

contender : Actel. The high end  products are the Stratyx II for Altera and 
Virtex4 
for Xilinx. The low cost  Spartan 3 from Xilinx may be of some interest too. 

What system to chose for  uploading? Stratyx seems better by some tens percent,
at least in the Altera  comparative. It must be keept in mind that there is a 
processing power doubling  every one year and half. The Moore's law applies 

here too. The difference  between current chips seems too narrow to designate a
clear  winner.

The FX Virtex4 includes two RISC microprocessors, each able  to work out one 
operation per clock cycle (300 MHz typical, 450 MHz maximum).  This is 
particularly interesting, because the FPGA logic cells can process the  fast 

currents, using precomputed results storred in look up tables (LUT) and the  
RISC 

computer may solve the slow currents part. Everything is done in a single  chip.
Th SX variant seems the best for Digital Signal Processing with up to 290  B 
operations per second (more than 200 high end PC power in a chip  !).

The gap junction noise could be  processed separately on  cheaper Spartan 3 

FPGA. The dendrite tree conduction could be actualized by  Actel chips, able to
solve one billion differential equations per second in the  combined 
analogic-digital Fusion chip.

The most powerfull computing  request comes from the metaneuron level, 

Stratyx II may be used here. One more  motive to use them here is the 
possibility to 
migrate to a custom made ASIC in a  second step, this is simpler with Altera, 
where this possibility is explicitely  implemented. Going from chips to 
boards, there seems to be no such element on  the market for the high end FX 

Virtex4. Stratyx II boards are cheaper and  include up to four FPGAs. Some can 
be 

stacked up. That solve the problem of  producing a dedicated board able to link
with many other.

Each  producer has a full range of products, so there is no need to mix them 
for chips  sourcing. The problem is that one of them can stop producing these 
systems. If  this is the one selected, everything must be started again with a 
unknown  product. Mixing the chip sources limit the problem. There would be 
some  acquaintance with the remaining product.

Xilinx chips are programmed with the free software iSE 8.1, It can be  

downloaded from : _www.xilinx.com_ (http://www.xilinx.com)  . Stratix  is 
configured 
with Quartus II, Altera has one unit in free access on its site 

_www.Altera.com_ (http://www.Altera.com)  . Who is interested to work on  this 
project ?
 

Yvan Bozzonetti.




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